Multiple gate finger field effect transistors (FETs) are often used for RF power amplifier applications. They typically comprise parallel elongate “finger-like” electrodes that extend over respective channel regions formed between side-by-side alternating drain and source regions formed in a substrate. Typically 3, 5, or 7 parallel gate fingers are included in a single device, and the spacing between the fingers is usually fixed to be the same, or alternatively may alternate between two values from inter-finger spacing to spacing across the device.
One of the issues with such transistors in use is that thermal build-up can occur, particularly in the center of the device adjacent the middle gate fingers. That is, as the device operates thermal energy will build up around the gate fingers, and slowly dissipate through the substrate. Due to the presence of multiple gate fingers in or around the center of the device thermal energy will build up in the region faster than it dissipates, resulting in an increase in the temperature of the operating substrate. Increased operating temperatures reduce device lifetimes and increase thermal noise within the device, and hence are undesirable.